Index of /~alps/phys.ethz.ch/dolfim/CMPS/dCMPS/optical
Name
Last modified
Size
Description
Parent Directory
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L4V8mu50N50Max4.log
2011-05-19 09:32
681K
L4V8mu35N50Max4.log
2011-05-19 09:32
681K
L4V8mu60N50Max4.log
2011-05-19 09:32
681K
L4V8mu65N50Max3.log
2011-05-19 09:32
680K
L4V8mu40N50Max4.log
2011-05-19 09:32
680K
L4V8mu50N50Max3.log
2011-05-19 09:32
680K
L4V8mu45N50Max4.log
2011-05-19 09:32
680K
L4V8mu60N50Max3.log
2011-05-19 09:32
680K
L4V8mu55N50Max3.log
2011-05-19 09:32
680K
L4V8mu55N50Max4.log
2011-05-19 09:32
680K
L4V8mu30N50Max4.log
2011-05-19 09:32
680K
L4V8mu30N50Max3.log
2011-05-19 09:32
680K
L4V8mu45N50Max3.log
2011-05-19 09:32
680K
L4V8mu40N50Max3.log
2011-05-19 09:32
680K
L4V8mu35N50Max3.log
2011-05-19 09:32
680K
L4V8mu15N50Max4.log
2011-05-19 09:32
679K
L4V8mu25N50Max4.log
2011-05-19 09:32
679K
L4V8mu20N50Max4.log
2011-05-19 09:32
679K
L4V8mu15N50Max3.log
2011-05-19 09:32
679K
L4V8mu25N50Max3.log
2011-05-19 09:32
679K
L4V8mu20N50Max3.log
2011-05-19 09:32
679K
L4V8mu65N50Max4.log
2011-05-19 09:32
678K
L4V8mu30N25Max4.log
2011-05-18 09:48
334K
L4V8mu35N25Max4.log
2011-05-18 09:48
334K
L4V8mu30N25Max3.log
2011-05-18 09:48
333K
L4V8mu15N25Max4.log
2011-05-18 09:48
333K
L4V8mu25N25Max4.log
2011-05-18 09:48
333K
L4V8mu20N25Max4.log
2011-05-18 09:48
333K
L4V8mu25N25Max3.log
2011-05-18 09:48
333K
L4V8mu20N25Max3.log
2011-05-18 09:48
333K
L4V8mu15N25Max3.log
2011-05-18 09:48
331K
L4V8mu35N25Max3.log
2011-05-18 09:48
328K
L4V8mu40N25Max4.log
2011-05-18 09:48
328K
L4V8mu40N25Max3.log
2011-05-18 09:48
327K
L4V8mu45N25Max3.log
2011-05-18 09:48
327K
L4V8mu50N25Max4.log
2011-05-18 09:48
327K
L4V8mu45N25Max4.log
2011-05-18 09:48
327K
L4V8mu55N25Max4.log
2011-05-18 09:48
326K
L4V8mu50N25Max3.log
2011-05-18 14:07
326K
L4V8mu55N25Max3.log
2011-05-18 09:48
326K
L4V8mu60N25Max4.log
2011-05-19 09:32
325K
L4V8mu65N25Max3.log
2011-05-18 09:48
325K
L4V8mu60N25Max3.log
2011-05-18 09:48
325K
L4V8mu65N25Max4.log
2011-05-19 09:32
325K
L4V8mu65N50Max4.task1.out.h5
2011-05-19 09:32
177K
L4V8mu65N50Max3.task1.out.h5
2011-05-19 09:32
177K
L4V8mu60N50Max4.task1.out.h5
2011-05-19 09:32
177K
L4V8mu60N50Max3.task1.out.h5
2011-05-19 09:32
177K
L4V8mu55N50Max4.task1.out.h5
2011-05-19 09:32
177K
L4V8mu55N50Max3.task1.out.h5
2011-05-19 09:32
177K
L4V8mu50N50Max4.task1.out.h5
2011-05-19 09:32
177K
L4V8mu50N50Max3.task1.out.h5
2011-05-19 09:32
177K
L4V8mu45N50Max4.task1.out.h5
2011-05-19 09:32
177K
L4V8mu45N50Max3.task1.out.h5
2011-05-19 09:32
177K
L4V8mu40N50Max4.task1.out.h5
2011-05-19 09:32
177K
L4V8mu40N50Max3.task1.out.h5
2011-05-19 09:32
177K
L4V8mu35N50Max4.task1.out.h5
2011-05-19 09:32
177K
L4V8mu35N50Max3.task1.out.h5
2011-05-19 09:32
177K
L4V8mu30N50Max4.task1.out.h5
2011-05-19 09:32
177K
L4V8mu30N50Max3.task1.out.h5
2011-05-19 09:32
177K
L4V8mu25N50Max4.task1.out.h5
2011-05-19 09:32
177K
L4V8mu25N50Max3.task1.out.h5
2011-05-19 09:32
177K
L4V8mu20N50Max4.task1.out.h5
2011-05-19 09:32
177K
L4V8mu20N50Max3.task1.out.h5
2011-05-19 09:32
177K
L4V8mu15N50Max4.task1.out.h5
2011-05-19 09:32
177K
L4V8mu15N50Max3.task1.out.h5
2011-05-19 09:32
177K
L4V8mu25N10Max3.log
2011-05-18 09:48
127K
L4V8mu25N10Max4.log
2011-05-18 09:48
127K
L4V8mu20N10Max4.log
2011-05-18 09:48
127K
L4V8mu15N10Max4.log
2011-05-18 09:48
127K
L4V8mu20N10Max3.log
2011-05-18 09:48
127K
L4V8mu15N10Max3.log
2011-05-18 09:48
127K
L4V8mu35N10Max4.log
2011-05-18 09:48
124K
L4V8mu30N10Max4.log
2011-05-18 09:48
124K
L4V8mu30N10Max3.log
2011-05-18 09:48
124K
L4V8mu35N10Max3.log
2011-05-18 09:48
124K
L4V8mu45N10Max4.log
2011-05-18 09:48
124K
L4V8mu40N10Max4.log
2011-05-18 09:48
124K
L4V8mu45N10Max3.log
2011-05-18 09:48
124K
L4V8mu40N10Max3.log
2011-05-18 09:48
124K
L4V8mu50N10Max4.log
2011-05-18 09:48
124K
L4V8mu55N10Max4.log
2011-05-18 09:48
124K
L4V8mu60N10Max4.log
2011-05-18 09:48
124K
L4V8mu50N10Max3.log
2011-05-18 09:48
124K
L4V8mu60N10Max3.log
2011-05-18 09:48
124K
L4V8mu65N10Max4.log
2011-05-18 09:48
124K
L4V8mu55N10Max3.log
2011-05-18 09:48
124K
L4V8mu65N10Max3.log
2011-05-18 09:48
124K
L4V8mu65N25Max4.task1.out.h5
2011-05-19 09:32
115K
L4V8mu65N25Max3.task1.out.h5
2011-05-18 09:48
115K
L4V8mu60N25Max4.task1.out.h5
2011-05-19 09:32
115K
L4V8mu60N25Max3.task1.out.h5
2011-05-18 09:48
115K
L4V8mu55N25Max4.task1.out.h5
2011-05-18 09:48
115K
L4V8mu55N25Max3.task1.out.h5
2011-05-18 09:48
115K
L4V8mu50N25Max4.task1.out.h5
2011-05-18 09:48
115K
L4V8mu50N25Max3.task1.out.h5
2011-05-18 14:07
115K
L4V8mu45N25Max4.task1.out.h5
2011-05-18 09:48
115K
L4V8mu45N25Max3.task1.out.h5
2011-05-18 09:48
115K
L4V8mu40N25Max4.task1.out.h5
2011-05-18 09:48
115K
L4V8mu40N25Max3.task1.out.h5
2011-05-18 09:48
115K
L4V8mu35N25Max4.task1.out.h5
2011-05-18 09:48
115K
L4V8mu35N25Max3.task1.out.h5
2011-05-18 09:48
115K
L4V8mu30N25Max4.task1.out.h5
2011-05-18 09:48
115K
L4V8mu30N25Max3.task1.out.h5
2011-05-18 09:48
115K
L4V8mu25N25Max4.task1.out.h5
2011-05-18 09:48
115K
L4V8mu25N25Max3.task1.out.h5
2011-05-18 09:48
115K
L4V8mu20N25Max4.task1.out.h5
2011-05-18 09:48
115K
L4V8mu20N25Max3.task1.out.h5
2011-05-18 09:48
115K
L4V8mu15N25Max4.task1.out.h5
2011-05-18 09:48
115K
L4V8mu15N25Max3.task1.out.h5
2011-05-18 09:48
115K
L4V8mu65N10Max4.task1.out.h5
2011-05-18 09:48
81K
L4V8mu65N10Max3.task1.out.h5
2011-05-18 09:48
81K
L4V8mu60N10Max4.task1.out.h5
2011-05-18 09:48
81K
L4V8mu60N10Max3.task1.out.h5
2011-05-18 09:48
81K
L4V8mu55N10Max4.task1.out.h5
2011-05-18 09:48
81K
L4V8mu55N10Max3.task1.out.h5
2011-05-18 09:48
81K
L4V8mu50N10Max4.task1.out.h5
2011-05-18 09:48
81K
L4V8mu50N10Max3.task1.out.h5
2011-05-18 09:48
81K
L4V8mu45N10Max4.task1.out.h5
2011-05-18 09:48
81K
L4V8mu45N10Max3.task1.out.h5
2011-05-18 09:48
81K
L4V8mu40N10Max4.task1.out.h5
2011-05-18 09:48
81K
L4V8mu40N10Max3.task1.out.h5
2011-05-18 09:48
81K
L4V8mu35N10Max4.task1.out.h5
2011-05-18 09:48
81K
L4V8mu35N10Max3.task1.out.h5
2011-05-18 09:48
81K
L4V8mu30N10Max4.task1.out.h5
2011-05-18 09:48
81K
L4V8mu30N10Max3.task1.out.h5
2011-05-18 09:48
81K
L4V8mu25N10Max4.task1.out.h5
2011-05-18 09:48
81K
L4V8mu25N10Max3.task1.out.h5
2011-05-18 09:48
81K
L4V8mu20N10Max4.task1.out.h5
2011-05-18 09:48
81K
L4V8mu20N10Max3.task1.out.h5
2011-05-18 09:48
81K
L4V8mu15N10Max4.task1.out.h5
2011-05-18 09:48
81K
L4V8mu15N10Max3.task1.out.h5
2011-05-18 09:48
81K
ALPS.xsl
2011-05-18 09:48
13K
L4V8mu65N50Max4.task1.lattice.xml
2011-05-18 14:07
8.0K
L4V8mu65N50Max3.task1.lattice.xml
2011-05-18 14:07
8.0K
L4V8mu60N50Max4.task1.lattice.xml
2011-05-18 14:07
8.0K
L4V8mu60N50Max3.task1.lattice.xml
2011-05-18 14:07
8.0K
L4V8mu55N50Max4.task1.lattice.xml
2011-05-18 14:07
8.0K
L4V8mu55N50Max3.task1.lattice.xml
2011-05-18 14:07
8.0K
L4V8mu50N50Max4.task1.lattice.xml
2011-05-18 14:07
8.0K
L4V8mu50N50Max3.task1.lattice.xml
2011-05-18 14:07
8.0K
L4V8mu45N50Max4.task1.lattice.xml
2011-05-18 14:07
8.0K
L4V8mu45N50Max3.task1.lattice.xml
2011-05-18 14:07
8.0K
L4V8mu40N50Max4.task1.lattice.xml
2011-05-18 14:07
8.0K
L4V8mu40N50Max3.task1.lattice.xml
2011-05-18 14:07
8.0K
L4V8mu35N50Max4.task1.lattice.xml
2011-05-18 14:07
8.0K
L4V8mu35N50Max3.task1.lattice.xml
2011-05-18 14:07
8.0K
L4V8mu30N50Max4.task1.lattice.xml
2011-05-18 14:07
8.0K
L4V8mu30N50Max3.task1.lattice.xml
2011-05-18 14:07
8.0K
L4V8mu25N50Max4.task1.lattice.xml
2011-05-18 14:07
8.0K
L4V8mu25N50Max3.task1.lattice.xml
2011-05-18 14:07
8.0K
L4V8mu20N50Max4.task1.lattice.xml
2011-05-18 14:07
8.0K
L4V8mu20N50Max3.task1.lattice.xml
2011-05-18 14:07
8.0K
L4V8mu15N50Max4.task1.lattice.xml
2011-05-18 14:07
8.0K
L4V8mu15N50Max3.task1.lattice.xml
2011-05-18 14:07
8.0K
L4V8mu65N25Max4.task1.lattice.xml
2011-05-18 09:48
4.3K
L4V8mu65N25Max3.task1.lattice.xml
2011-05-18 09:48
4.3K
L4V8mu60N25Max4.task1.lattice.xml
2011-05-18 09:48
4.3K
L4V8mu60N25Max3.task1.lattice.xml
2011-05-18 09:48
4.3K
L4V8mu55N25Max4.task1.lattice.xml
2011-05-18 09:48
4.3K
L4V8mu55N25Max3.task1.lattice.xml
2011-05-18 09:48
4.3K
L4V8mu50N25Max4.task1.lattice.xml
2011-05-18 09:48
4.3K
L4V8mu50N25Max3.task1.lattice.xml
2011-05-18 09:48
4.3K
L4V8mu45N25Max4.task1.lattice.xml
2011-05-18 09:48
4.3K
L4V8mu45N25Max3.task1.lattice.xml
2011-05-18 09:48
4.3K
L4V8mu40N25Max4.task1.lattice.xml
2011-05-18 09:48
4.3K
L4V8mu40N25Max3.task1.lattice.xml
2011-05-18 09:48
4.3K
L4V8mu35N25Max4.task1.lattice.xml
2011-05-18 09:48
4.3K
L4V8mu35N25Max3.task1.lattice.xml
2011-05-18 09:48
4.3K
L4V8mu30N25Max4.task1.lattice.xml
2011-05-18 09:48
4.3K
L4V8mu30N25Max3.task1.lattice.xml
2011-05-18 09:48
4.3K
L4V8mu25N25Max4.task1.lattice.xml
2011-05-18 09:48
4.3K
L4V8mu25N25Max3.task1.lattice.xml
2011-05-18 09:48
4.3K
L4V8mu20N25Max4.task1.lattice.xml
2011-05-18 09:48
4.3K
L4V8mu20N25Max3.task1.lattice.xml
2011-05-18 09:48
4.3K
L4V8mu15N25Max4.task1.lattice.xml
2011-05-18 09:48
4.3K
L4V8mu15N25Max3.task1.lattice.xml
2011-05-18 09:48
4.3K
L4V8mu65N50Max4.task1.out.xml
2011-05-19 09:32
4.0K
L4V8mu65N50Max3.task1.out.xml
2011-05-19 09:32
4.0K
L4V8mu55N50Max4.task1.out.xml
2011-05-19 09:32
4.0K
L4V8mu55N50Max3.task1.out.xml
2011-05-19 09:32
4.0K
L4V8mu50N50Max4.task1.out.xml
2011-05-19 09:32
4.0K
L4V8mu50N50Max3.task1.out.xml
2011-05-19 09:32
4.0K
L4V8mu45N50Max4.task1.out.xml
2011-05-19 09:32
4.0K
L4V8mu45N50Max3.task1.out.xml
2011-05-19 09:32
4.0K
L4V8mu40N50Max4.task1.out.xml
2011-05-19 09:32
4.0K
L4V8mu40N50Max3.task1.out.xml
2011-05-19 09:32
4.0K
L4V8mu35N50Max4.task1.out.xml
2011-05-19 09:32
4.0K
L4V8mu35N50Max3.task1.out.xml
2011-05-19 09:32
4.0K
L4V8mu30N50Max4.task1.out.xml
2011-05-19 09:32
4.0K
L4V8mu30N50Max3.task1.out.xml
2011-05-19 09:32
4.0K
L4V8mu25N50Max4.task1.out.xml
2011-05-19 09:32
4.0K
L4V8mu25N50Max3.task1.out.xml
2011-05-19 09:32
4.0K
L4V8mu20N50Max4.task1.out.xml
2011-05-19 09:32
4.0K
L4V8mu20N50Max3.task1.out.xml
2011-05-19 09:32
4.0K
L4V8mu15N50Max4.task1.out.xml
2011-05-19 09:32
4.0K
L4V8mu15N50Max3.task1.out.xml
2011-05-19 09:32
4.0K
L4V8mu60N50Max4.task1.out.xml
2011-05-19 09:32
4.0K
L4V8mu60N50Max3.task1.out.xml
2011-05-19 09:32
4.0K
L4V8mu65N50Max4.task1.in.xml
2011-05-18 14:07
3.7K
L4V8mu65N50Max3.task1.in.xml
2011-05-18 14:07
3.7K
L4V8mu55N50Max4.task1.in.xml
2011-05-18 14:07
3.7K
L4V8mu55N50Max3.task1.in.xml
2011-05-18 14:07
3.7K
L4V8mu50N50Max4.task1.in.xml
2011-05-18 14:07
3.7K
L4V8mu50N50Max3.task1.in.xml
2011-05-18 14:07
3.7K
L4V8mu45N50Max4.task1.in.xml
2011-05-18 14:07
3.7K
L4V8mu45N50Max3.task1.in.xml
2011-05-18 14:07
3.7K
L4V8mu40N50Max4.task1.in.xml
2011-05-18 14:07
3.7K
L4V8mu40N50Max3.task1.in.xml
2011-05-18 14:07
3.7K
L4V8mu35N50Max4.task1.in.xml
2011-05-18 14:07
3.7K
L4V8mu35N50Max3.task1.in.xml
2011-05-18 14:07
3.7K
L4V8mu30N50Max4.task1.in.xml
2011-05-18 14:07
3.7K
L4V8mu30N50Max3.task1.in.xml
2011-05-18 14:07
3.7K
L4V8mu25N50Max4.task1.in.xml
2011-05-18 14:07
3.7K
L4V8mu25N50Max3.task1.in.xml
2011-05-18 14:07
3.7K
L4V8mu20N50Max4.task1.in.xml
2011-05-18 14:07
3.7K
L4V8mu20N50Max3.task1.in.xml
2011-05-18 14:07
3.7K
L4V8mu15N50Max4.task1.in.xml
2011-05-18 14:07
3.7K
L4V8mu15N50Max3.task1.in.xml
2011-05-18 14:07
3.7K
L4V8mu60N50Max4.task1.in.xml
2011-05-18 14:07
3.7K
L4V8mu60N50Max3.task1.in.xml
2011-05-18 14:07
3.7K
L4V8mu65N25Max4.task1.out.xml
2011-05-19 09:32
2.6K
L4V8mu65N25Max3.task1.out.xml
2011-05-18 09:48
2.6K
L4V8mu55N25Max4.task1.out.xml
2011-05-18 09:48
2.6K
L4V8mu55N25Max3.task1.out.xml
2011-05-18 09:48
2.6K
L4V8mu50N25Max4.task1.out.xml
2011-05-18 09:48
2.6K
L4V8mu50N25Max3.task1.out.xml
2011-05-18 14:07
2.6K
L4V8mu45N25Max4.task1.out.xml
2011-05-18 09:48
2.6K
L4V8mu45N25Max3.task1.out.xml
2011-05-18 09:48
2.6K
L4V8mu40N25Max4.task1.out.xml
2011-05-18 09:48
2.6K
L4V8mu40N25Max3.task1.out.xml
2011-05-18 09:48
2.6K
L4V8mu35N25Max4.task1.out.xml
2011-05-18 09:48
2.6K
L4V8mu35N25Max3.task1.out.xml
2011-05-18 09:48
2.6K
L4V8mu30N25Max4.task1.out.xml
2011-05-18 09:48
2.6K
L4V8mu30N25Max3.task1.out.xml
2011-05-18 09:48
2.6K
L4V8mu25N25Max4.task1.out.xml
2011-05-18 09:48
2.6K
L4V8mu25N25Max3.task1.out.xml
2011-05-18 09:48
2.6K
L4V8mu20N25Max4.task1.out.xml
2011-05-18 09:48
2.6K
L4V8mu20N25Max3.task1.out.xml
2011-05-18 09:48
2.6K
L4V8mu15N25Max4.task1.out.xml
2011-05-18 09:48
2.6K
L4V8mu15N25Max3.task1.out.xml
2011-05-18 09:48
2.6K
L4V8mu60N25Max4.task1.out.xml
2011-05-19 09:32
2.6K
L4V8mu60N25Max3.task1.out.xml
2011-05-18 09:48
2.6K
L4V8mu65N25Max4.task1.in.xml
2011-05-18 09:48
2.5K
L4V8mu65N25Max3.task1.in.xml
2011-05-18 09:48
2.5K
L4V8mu55N25Max4.task1.in.xml
2011-05-18 09:48
2.5K
L4V8mu55N25Max3.task1.in.xml
2011-05-18 09:48
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L4V8mu65N10Max4.task1.lattice.xml
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L4V8mu65N10Max4.task1.out.xml
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L4V8mu65N50Max4.in.xml
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L4V8mu65N25Max4.in.xml
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L4V8mu50N25Max4.in.xml
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L4V8mu35N50Max4.in.xml
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L4V8mu35N25Max4.in.xml
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L4V8mu30N25Max4.in.xml
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L4V8mu15N50Max4.in.xml
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L4V8mu65N50Max4.out.xml
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L4V8mu65N50Max3.out.xml
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L4V8mu65N25Max4.out.xml
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L4V8mu65N10Max4.out.xml
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L4V8mu60N50Max4.out.xml
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L4V8mu60N50Max3.out.xml
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L4V8mu60N25Max4.out.xml
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L4V8mu60N25Max3.out.xml
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L4V8mu55N50Max4.out.xml
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L4V8mu55N50Max3.out.xml
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L4V8mu55N25Max4.out.xml
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L4V8mu50N50Max4.out.xml
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L4V8mu50N50Max3.out.xml
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L4V8mu50N25Max4.out.xml
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L4V8mu50N10Max4.out.xml
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L4V8mu45N50Max4.out.xml
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L4V8mu45N50Max3.out.xml
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L4V8mu45N25Max4.out.xml
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L4V8mu40N50Max4.out.xml
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L4V8mu40N25Max4.out.xml
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L4V8mu35N50Max4.out.xml
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L4V8mu35N50Max3.out.xml
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L4V8mu35N25Max4.out.xml
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L4V8mu30N50Max4.out.xml
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L4V8mu30N25Max4.out.xml
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L4V8mu25N50Max4.out.xml
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L4V8mu25N25Max4.out.xml
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L4V8mu20N50Max4.out.xml
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L4V8mu20N25Max4.out.xml
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L4V8mu15N50Max4.out.xml
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L4V8mu15N25Max4.out.xml
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